A non-volatile semiconductor memory device in next generation has been developed. The non-volatile semiconductor memory device in next generation has characteristics such as a capability of high speed rewriting and a rewriting number being over five figures as comparing with a conventional EEPROM or flash memory. The non-volatile semiconductor memory device in next generation has also an aim to realize capacity, speed and cost comparable in quality to a DRAM. An FeRAM (Ferroelectric Random Access Memory), a MRAM (Magnetic Random Access Memory), a PRAM (Phase Change Random Access Memory), a RRAM (Resistive Random Access Memory) or the like has been developed as the next-generation non-volatile semiconductor memory device.
The PRAM records information by using different crystalline states of a phase-change element. Actually, when a phase-change element is changed from a poly-crystalline state with lower resistance of “1” state to an amorphous state with higher resistance of “0”, so called reset operation, comparatively large current (reset current) is flowed to the phase-change element SR1 so as to rise up a temperature of the phase-change element over melting point (Tm), subsequently, the phase-change element is rapidly cooled. On the other hand, when the phase-change element is changed from the amorphous state with higher resistance of “0” to the poly-crystalline state with lower resistance of “1”, so called set operation, comparatively small current (set current) is flowed to the phase-change element so as to retain the phase-change element at a crystallizing temperature (Tc) below Tm as shown in Japanese Patent Publication (Kokai) No. 2004-158854.
The reset current flowing in the phase-change element of the memory cell is comparatively larger, for example 0.5-1 mA. Therefore, generated joule heat or the like in the phase-change element cause difficulty on highly integrating the phase-change memory. Further, necessity of precisely writing in information and reading out information in a low voltage region generates difficulty in the PRAM as disclosed in Japanese Patent Publication (Kokai) No. 2004-158854 (P14 and FIGS. 1 and 2).
According to an aspect of the invention, there is provided, a semiconductor memory device, including, a semiconductor substrate, a phase-change element formed on the semiconductor substrate, the phase-change element including a phase-change film and electrode films, a joule heat portion contacting with the electrode film, the phase-change film being formed around the joule heat portion, and a radiation-shield film suppressing dissipation of thermal radiation emitted from the joule heat portion.